నైరూప్య

Improvement of Power Factor by Adopting Conventional and Bridgeless PFC for Closed Loop Control of PMBLDC Motor

DEEPA HIREMATHA, R. RADHA, Dr. A. D. KULKARNI, Dr.T.ANANTHAPADMANABHA

In this paper Simulation of a voltage controlled VSI fed PMBLDC motor is presented. In this work a bridgeless PFC boost rectifier is proposed to reduce harmonic current of a BLDC motor. The aim of the work is to improve the input power factor of PMBLDC drive. Conventional VSI fed BLDC motor suffers from the poor power factor, increased total harmonic distortion, high conduction loss in the input rectifier-bridge. Improved power factor, reduced THD,higher efficiency can be achieved by using the bridgeless boost topology. Conventional bridged PFC topology is replaced by bridgeless PFC topology which ensures near unity power factor. The proposed speed control scheme has the concept of DC link voltage control proportional to the desired speed of the PMBLDC motor. The speed is regulated by a PI controller. In this paper Performance comparison between the conventional VSI (with and without pre regulator circuit) fed BLDC motors and the bridgeless PFC converter fed BLDC motor are presented. The simulation study reveals that the input power factor in bridgeless PFC converter fed PMBLDC motor is improved and generate less THD when compared with Conventional VSI fed PMBLDC motor.