నైరూప్య

Phase Locked Loop design Using Low Power Process and Temperature Compensated VCO

D.Anitha, Dr. K. Manjunatha chary , Dr P.Sathish Kumar, Md.Masood ahmad

In this paper the design and verification of PLL using low power VCO is presented and implemented . Process and Temperature Compensation techniques for minimizing the variation of the free-running frequency of Voltage Controlled Oscillator are discussed. Matched up and down currents Charge Pump is designed. An Addition based current source ring oscillator is used to achieve low power. The power and area for the ring oscillator is 87μ W and 0.013 mm2. PLL is operated at 1.25GHz.